Test capacity is "specified" by the chip designer, unlike other capacity in the semiconductor manufacturing process.

Picking up where I last stopped in these test capacity management chronicles, I am reminded of a season of significant growth in semiconductor test outsourcing followed by a tightening of test capacity management strategies after the dot-com bubble had burst. Still at Teradyne during that time, I primarily worked with both Freescale, Qualcomm and their many outsourced semiconductor assembly and test (OSAT) partners.

in the late 1990s, Freescale launched its "asset light" strategy to rein in what had become a large and unwieldy global manufacturing operation fraught with underutilized assets. The new strategy was designed to optimize the balance of internal manufacturing and outsourced manufacturing, leveraging the then very capable and reliable foundry and OSAT ecosystem. The leading foundries such as TSMC had already proven they could achieve profitable economies of scale by aggregating the front-end fabrication requirements of multiple customers, and the OSAT providers were striving to prove the same for backend assembly and test.

There is, however, a fundamental difference in how test capacity is established -- relative to fabrication capacity and assembly or packaging capacity -- that impacts the aggregation efficiencies and economies of scale of the test provider.

The unique nature of test capacity requires it to be managed in a unique way.

With test specifier "rules" often unique for each of the thousands of chip types being tested every day, test capacity is essentially variable and more difficult to manage and keep utilized. The requisite economies-of-scale returns for a profitable outsourcing model are therefore not as readily realized by the test provider as they are for the foundry. These challenges still hold true today.

Still, Freescale eventually trimmed its internal backend capabilities from seven to two facilities, and the OSATs continued to grow. As the new millennium approached, the dot-com bubble caused the growth in semiconductors and everything high tech to soar. Test capacity utilization was therefore at a peak, and the biggest concern related to test capacity management was simply capacity availability. The end of the dot-com era brought test capacity utilization lows -- and an entirely different view of test capacity management -- to the OSATs and other test providers. I'll discuss my introduction to Qualcomm and explore the dot-com impact on test capacity management in my next entry.

This article was originally posted at www.EEtimes.com